Job Description
Design Engineer – Emulation & High-Speed Interfaces
Palladium Solutions Development
Why Join Us
We’re building the next generation of full-system emulation and verification solutions—and we’re looking for a seasoned
Design Engineer
to help lead the way. If you’re passionate about high-speed interfaces, system-level verification, and solving complex engineering challenges at scale, this is an opportunity to make a real impact on industry-defining technology.
You’ll work hands-on with
Palladium and Protium emulation platforms , developing high-fidelity models and end-to-end verification environments that enable early software bring-up and accelerate silicon success.
What You’ll Do
Lead the development and deployment of
PHY logic and interface models
for emulation platforms including
Palladium
and
Protium
Design, integrate, and validate
high-speed interface subsystems
(SerDes, chip-to-chip links) in full-system emulation environments
Develop
end-to-end verification flows , including:
System-level modeling (microcontrollers, memories, NoC, controllers, MACs)
Custom test case development and automation
Interface performance analysis and validation
Convert
Analog/Mixed-Signal (AMS)
parallel and serial models into emulation-ready implementations with functional and bit accuracy
Enable
bare-metal driver validation
and early software stack development in emulation
Collaborate with architecture, IP, verification, and software teams to ensure smooth transitions from simulation to emulation
Optimize multi-clock domain designs for
accuracy, performance, area, and runtime
Drive innovation in
emulatable IP and AVIP solutions , influencing next-generation verification methodologies
Support
system prototyping and early bring-up
for complex SoC designs
What You Bring
Required Qualifications
Bachelor’s or Master’s degree in
Electrical Engineering, Computer Engineering , or related field
7–15 years
of experience in system-level design, verification, or emulation
Strong experience with
high-speed communication protocols , including:
PCIe, UCIe, Ethernet, UALink, DDR, USB, SPI, JTAG, AMBA
Proven expertise in:
SystemVerilog
for synthesizable RTL design
C and Python
for modeling, scripting, automation, and test development
Converting
AMS designs
into emulation models supporting configuration, control, and status monitoring
Lab debug, performance analysis, and test case development
Hands-on experience with
emulation and prototyping platforms , such as:
Palladium, Protium, Zebu, HAPS, Veloce, FPGA
Strong understanding of
verification flows , emulation acceleration, and hardware/software co-verification
Nice to Have
Experience building
Acceleratable Verification IP (AVIP)
Familiarity with
end-to-end verification environments
from simulation through emulation
Background in
system prototyping, SoC bring-up, and pre-silicon validation
Strong analytical, debugging, and problem-solving skills
Excellent communication, collaboration, and technical leadership abilities
Make an Impact!
We’re doing work that matters. Help us solve what others can’t.
Join a team where your expertise directly shapes how complex systems are verified, validated, and brought to life.
