Senior Memory Design Engineer (DDR)

Senior Memory Design Engineer – Semiconductor My client, a leading semiconductor company, is seeking a

Senior Memory Design Engineer

to drive the design and development of advanced memory subsystem solutions. The role sits within a specialist Memory Design team and involves close collaboration with architecture, RTL, and verification teams to deliver high-performance memory systems for next-generation processors.

Key Requirements (Essential):

8+ years industry experience Strong knowledge of DDR or HBM memory technologies Proven experience designing or integrating memory controllers Experience with AXI protocol RTL design proficiency (Verilog or VHDL) Experience with timing, constraints, and basic block-level testing

Nice to Have:

Master’s or PhD Scripting (Python, Perl, Bash, TCL) Version control (Git, SVN) Understanding of coherency concepts/protocols Experience defining memory maps

Additional Info:

Competitive compensation Flexible working environment Learning and development opportunities Relocation/visa support available (role-based in Barcelona)