Field-programmable gate arrays engineer

Akronos Group, International company leader in innovation, R& D and high-tech engineering services, is looking for the following profile/s: Signalling Engineer

Job profile. Signaling ENGINEER Job location: Roma

Main Responsibilities:

Definition of Technical specifications, hardware requirements and implementations for digital designs targeting FPGAs (So C) Planning and follow-up of activities during all the phases of Hardware and Firmware development and life cycle in compliance with programme and product requirements Project scheduling and report writing with respect to the Company internal rules, normative procedures and deadlines Responsible for Hardware and Firmware requirements analysis, design, test, integration and validation activities Design methodologies based on the reuse of Intellectual Properties (IPs) Technical Requirements:

Engineering Master Degree : Electronic, Telco, Computer or similar Programming and Scripting Languages: C/C++, TCL, Python, shell-scripts Knowledge of RTL design and verification methodologies, HDL code (VHDL, Verilog), pre/post synthesis simulations, Static Timing Analysis Knowledge of DO254 Knowledge of Model Based design methodologies (Matlab Simulink, System Generator, DSP Builder, HDL Coder) Knowledge of Intel and Xilinx FPGA Architectures, design Suites (Vivado/Quartus) and state-of-the-art design flows Knowledge of Digital Signal Processing for Radar applications Knowledge of Analogue/Digital Communications Principles (Modulation, Coding… ) Knowledge of main bus and electrical standards/protocols for digital communication (i.e. uart, high speed serdes, rs485/422, arinc, I2 C, SPI, PCIe, VME, Open VPX) Knowledge of laboratory instrumentation (Oscilloscope, Logic State Analizer/Patter Generator, Signal Generator, Power Meter, VNA) and measurement theory for the verification of stand-alone electronic boards and devices