Senior Physical Design Engineer

4+ years experience in Physical Design Experience in Floorplanning for SoC using Innovus Must have a knowledge and implementation strategies to create an IO ring in accordance design specification Have a deep knowledge on ESD, latch-up etc for foundary requirements and placement strategies Should have a higherarchial design implementation knowledge which include partitions/HMs/tiles push down to each core/tile PG creation and push down methodologies knowledge and implementation Should have a knowledge on Analog components and their requirements in placements according to design specifications RDL knowledge and working with packaging is a must for SoC floorplan designer PV clean-up on floorplan and self derive in all the sign-off including Physical Verification, ESD and foundry/Analog requirements Deep scripting knowledge is essential Good problem-solving capabilities, proactive, hardworking with strong interpersonal skills. Bachelors Degree in Electrical, Electronics or Computer Engineering