Memory Layout Engineer

ACL Digital is looking for smart and enterprising Memory Layout Engineers to come join us and get an opportunity to do some cutting edge work and also work in a great environment where work is Always Fun and Exciting.

Experience: 4 to 5 Years

Skills :

Having lower node Finfet experience. (10nm & less) Memory compiler layout, SRAM, Register File (RF) Available to join in 3-4 weeks . Location: Noida/ Hyderabad

For more details Contact: 6380023419 Email: krishnaprasath.s@acldigital.com