DV Engineer

Hi all jobseekers,

Modernize chip solutions is hiring for the below requirements.

Role:

Design Verification Engineer

Location:

Bengaluru

Experience:

4+yrs

Notice Period:

Immediate to 15 days

Skills:

Strong experience in IP & SoC Verification Proficiency in System Verilog and UVM Hands-on experience in Silicon Validation

Role:

Design Verification Engineer

Location:

Bengaluru

Experience:

5+yrs

Notice Period:

Immediate to 15 days

Skills:

Strong expertise in SystemVerilog & UVM Experience in developing and maintaining SV/UVM testbenches Hands-on experience with Networking SoCs & High-Speed SerDes Strong debugging and verification closure experience Proficient in Functional Coverage & SVA Experience with GLS (Zero Delay & SDF) & X-propagation simulations Scripting skills in Python/Perl Tools:

VCS, Verdi, etc.

If anyone interested, please share your profile to my mail id