FPGA Silicon Validation Engineer

Title

: FPGA Silicon Validation Engineer

No of Positions (3)

: Lead Engineer / Senior Engineer / Team Member Years of Exp

: 5+ Years Location

: Hyderabad, India – 100% Onsite Required Ideal Start Date

: ASAP (Looking for Immediate Joiners (15-30 days) Process

: 2 rounds of interview (Technical Round → Advanced Technical/Panel).

Scope

: Client is seeking FPGA Silicon Validation Engineers across multiple experience levels to support FPGA system validation, high-speed protocol validation, silicon feature enablement, and embedded processor-based subsystem validation. Engineers will work closely with hardware architectures and system-level design implementations to validate silicon features and ensure robust performance. Strong lab debug capability and hands-on FPGA board validation experience are critical.

Skills Needed for Lead FPGA Engineer Lead Engineer (SerDes / DDR / SoC / Configuration & Security): Strong hands-on FPGA silicon validation leadership experience Protocol expertise in one or more: PCIe Gen4/5, DDR4/5, Ethernet, Processor-based subsystems Experience planning and executing complex FPGA system validation projects Responsible for team-level deliverables and mentoring junior engineers Deep knowledge depending on domain (SerDes PMA/PCS/DFE/CTLE, DDR interface training and validation, SoC subsystem validation, Configuration/Security including SPI/QSPI/Octal SPI, Crypto, PUF, etc.)

Necessary Skills: Exceptional digital fundamentals Hands-on experience in System Design with FPGA devices using relevant FPGA EDA tools Experience designing and implementing FPGA-based solutions using Microchip, Xilinx, or Altera FPGAs Strong coding skills in Verilog/SystemVerilog, VHDL, and C for embedded processors; ability to maintain existing code Experience developing testbenches using Verilog/SystemVerilog and validating designs in simulation using BFM/VIP Experience with synthesis, placement constraints, STA constraint definition, and timing closure for high-speed designs Validation of FPGA-based implementation on hardware boards Embedded firmware development in C/C++ Strong lab debug experience using oscilloscopes, protocol analyzers, embedded and RTL debuggers Experience with on-chip debug tools Scripting experience in TCL/Perl Exposure to version control systems (GitHub, SVN) Strong background in silicon validation, failure analysis, and debug Understanding of hardware architectures, use models, and system-level design implementations