Silicon Validation Engineer

Hiring for FPGA Silicon Validation Engineer | Onsite | Long Term Contract

Title: FPGA Silicon Validation Engineer (Team Member / Senior / Lead) Duration: Long Term Contract Location: Hyderabad, India – 100% Onsite Process: 2 rounds of interview (Technical Round → Advanced Technical/Panel). Background Check: Yes

Job Description: Client is seeking FPGA Silicon Validation Engineers across multiple experience levels to support FPGA system validation, high-speed protocol validation, silicon feature enablement, and embedded processor-based subsystem validation. Engineers will work closely with hardware architectures and system-level design implementations to validate silicon features and ensure robust performance. Strong lab debug capability and hands-on FPGA board validation experience are critical. Required Skills: Exceptional digital fundamentals -Hands-on experience in System Design with FPGA devices using relevant FPGA EDA tools. Experience designing and implementing FPGA-based solutions using Microchip, Xilinx, or Altera FPGAs. Strong coding skills in Verilog/SystemVerilog, VHDL, and C for embedded processors; ability to maintain existing code. Experience developing testbenches using Verilog/SystemVerilog and validating designs in simulation using BFM/VIP. Experience with synthesis, placement constraints, STA constraint definition, and timing closure for high-speed designs. Validation of FPGA-based implementation on hardware boards -Embedded firmware development in C/C++. Strong lab debug experience using oscilloscopes, protocol analyzers, embedded and RTL debuggers. Experience with on-chip debug tools. Scripting experience in TCL/Perl -Exposure to version control systems (GitHub, SVN) -Strong background in silicon validation, failure analysis, and debug. Understanding of hardware architectures, use models, and system-level design implementations Additional Skills: - Basic knowledge of embedded processors such as ARM Cortex-M3 or RISC-V -Familiarity with AMBA protocols (APB, AHB, AXI, ACE). Embedded software C/C++ programming and bare-metal application development -Board-level debug skills using oscilloscopes, digital analyzers, protocol exercisers, and integrated logic analyzers (e.g., Synopsys Identify, Xilinx Chipscope).

Skill Needs Based on Experience Level:

Lead Engineer (SerDes / DDR / SoC / Configuration & Security): - Strong hands-on FPGA silicon validation leadership experience - Protocol expertise in one or more: PCIe Gen4/5, DDR4/5, Ethernet, Processor-based subsystems - Experience planning and executing complex FPGA system validation projects - Responsible for team-level deliverables and mentoring junior engineers - Deep knowledge depending on domain (SerDes PMA/PCS/DFE/CTLE, DDR interface training and validation, SoC subsystem validation, Configuration/Security including SPI/QSPI/Octal SPI, Crypto, PUF, etc.)

Senior Engineers: - Strong FPGA silicon validation experience - Hands-on validation in one or more protocols: PCIe Gen4/5, DDR4/5, 100G/50G/40G/25G/10G Ethernet, USB 3.2, JESD204C, 1588 PTP, MIPI, MACSEC - Experience with high-speed memory interfaces (DDR4/5, LPDDR4/5, QDR II+/IV) - Embedded processor and peripheral validation (SPI, I3C, UART, NOC, Trace, USB) - Developing testbenches and validating complex subsystem-level use cases - Strong C programming experience. Validating FPGA configuration and security features Team Members. Hands-on FPGA board-level validation experience. Validation experience in AXI/AHB/APB, SPI, UART, I3C/I2C, USB, SerDes-based protocols, embedded processors, and memory interfaces. Develop validation designs in RTL and C -Validate features at block and subsystem levels