Job Description
This role is open across our global offices, and successful candidates may be based in any of our international office locations.
Key Responsibilities
Develop and optimize compiler components for AI workloads (e.g., graph optimizations, operator fusion, scheduling).
Collaborate with hardware and software teams to design compiler backends for NPUs, and custom accelerators.
Implement performance tuning techniques for deep learning models across diverse architectures.
Contribute to open-source compiler projects and maintain internal toolchains.
Analyze and improve compilation pipelines for frameworks like PyTorch, TensorFlow, and ONNX.
Required Qualifications
Masterโs degree or PhD in Computer Science, Electrical Engineering, or related field.
Strong proficiency in
C++
,
Python
, and compiler design principles.
2 out of 3 below,
Knowledge of AI frameworks (PyTorch, TensorFlow)
Familiarity with hardware architectures (GPU, TPU, NPU) and parallel computing.
Understanding of graph-based optimizations.
Preferred Qualifications
Experience with
quantization
,
kernel optimization
, and
code generation for AI accelerators
.
Experience with MLIR, LLVM, or similar compiler infrastructures.
Contributions to open-source compiler or AI projects.
Understanding of performance profiling and benchmarking for AI workloads.
Ready to Apply?
Don't miss this opportunity! Apply now and join our team.
Job Details
Posted Date:
February 27, 2026
Job Type:
Construction
Location:
India
Company:
Renesas Electronics
Ready to Apply?
Don't miss this opportunity! Apply now and join our team.