Lead SystemC Engineer

Job Title: SystemC Engineer Location: Bangalore Experience: 3+ Years Employment Type: Full-Time Notice period: Immediate to 60 days

Job Summary: We are looking for a skilled

SystemC Engineer

with 3+ years of experience in System-level modeling and TLM-based design. The ideal candidate should have strong C++ expertise and experience in developing high-level architectural models for SoC/ASIC verification. Key Responsibilities: Develop and maintain SystemC/TLM 2.0 models for SoC/IP level design. Create high-level architectural and performance models. Work closely with RTL, architecture, and verification teams. Develop transaction-level models (TLM) and virtual platforms. Perform model validation and debugging. Optimize simulation performance. Contribute to design reviews and technical documentation. Required Skills: Strong experience in

SystemC

and

TLM 2.0 Excellent programming skills in

C++ Experience in SoC architecture and AMBA protocols (AXI/AHB/APB) Understanding of RTL design concepts Experience with simulation/debug tools Good knowledge of Linux environment Good to Have: Experience with Virtual Platforms Knowledge of UVM/SystemVerilog Exposure to ARM-based architectures Scripting knowledge (Python/Shell)