Senior ASIC Verification Engineer

Job Description: Senior Verification Engineer

Location:

Bangalore / Hyderabad / Pune / Ahmedabad Experience:

5–10 Years Job Type:

Full-time | On-site Industry:

Semiconductor / VLSI / ASIC

About the Role We are looking for a highly skilled

Senior Verification Engineer

to lead verification activities for complex IP/SoC designs. The ideal candidate will have strong expertise in

SystemVerilog, UVM

, and hands-on experience driving verification strategies end-to-end. Key Responsibilities Own and execute verification for IP/Sub‑system/SoC-level deliverables. Develop

UVM-based testbenches

, stimulus, checkers, scoreboards, and coverage models. Create and maintain test plans, verification strategies, and documentation. Perform debugging using industry-standard tools and collaborate closely with RTL designers. Analyze functional coverage, identify gaps, and ensure full verification closure. Work on

assertion-based verification (SVA)

to validate complex protocols and logic. Drive automation, improve testbench infrastructure, and optimize regressions. Mentor junior engineers and guide them on verification best practices. Participate in design and architecture discussions with cross‑functional teams. Support tape‑out readiness through high-quality verification signoff. Required Skills & Experience 5+ years of hands-on experience

in ASIC/SoC/IP Verification. Strong expertise in

SystemVerilog and UVM methodology

. Solid understanding of digital design fundamentals, SoC architecture, and bus/protocols. Experience with at least one of: High-speed protocols:

PCIe, CXL, USB, Ethernet, DDR, AMBA (AXI/AHB/APB) CPU/Cache/Coherency verification Low-power verification (UPF) Proficiency with verification tools:

VCS, Questa, Incisive/Xcelium

, Verdi, DVE, SimVision. Strong debugging and problem-solving skills. Experience in functional coverage closure and assertion development. Ability to work independently on block/sub-system level verification. Good-to-Have Experience in

Python/Perl/TCL

for automation. Exposure to formal verification. Knowledge of emulation/FPGA prototyping environments. Understanding of verification of AI/ML accelerators, DSP blocks, or RISC‑V cores. Education B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, VLSI, or related field. Why Join Us? Opportunity to work on cutting-edge semiconductor designs. Collaborative and innovation-driven work culture. Career growth, technical learning, and leadership opportunities.