FPGA Infrastructure Engineer

FPGA Infrastructure Engineer – Ultra Low‑Latency Trading Systems (C++ / HLS)

We are partnering with a well‑capitalised proprietary trading firm seeking an experienced FPGA Infrastructure Engineer to help build and evolve its ultra low‑latency trading platform. This is a hands‑on role working on performance‑critical systems where every nanosecond counts.

You will focus on developing and maintaining HLS C++ code for FPGA‑based trading infrastructure, while also occasionally diving into lower‑level FPGA implementation and tooling. You’ll work closely with a small, highly technical team and take end‑to‑end ownership of components that run in live production.

What you’ll be working on

Designing, developing, and maintaining low‑latency, high‑performance C++ code for synthesis with Vivado HLS. Implementing and optimising FPGA infrastructure for AMD/Xilinx devices in a production trading environment. Improving build, synthesis, and deployment flows to reduce iteration time and increase reliability. Profiling, debugging, and optimising existing modules to squeeze out latency and improve throughput. Collaborating with traders, quants, and engineers to translate requirements into robust FPGA solutions.

What we’re looking for

4+ years of professional experience with modern C++ (C++14 or later) in performance‑sensitive systems. 4+ years working with Xilinx Vivado HLS and AMD/Xilinx FPGA platforms. Hands‑on experience with at least one HDL such as SystemVerilog, VHDL, or similar. Strong problem‑solving skills, a high sense of ownership, and comfort working on live, production systems. Advantageous: prior exposure to electronic trading, market data, or financial/stock markets.

What’s on offer

Competitive base salary in the range of approximately 120,000–150,000 USD (depending on experience and location). Significant impact on a core, latency‑critical trading platform used in live markets. Opportunity to work in a small, highly skilled engineering team with direct visibility of your work. A culture that values technical excellence, accountability, and continuous optimisation.

If you have strong C++ and FPGA/HLS experience and would like to work on real‑time trading systems in a confidential, high‑impact setting, please apply with your CV or reach out directly for a discreet conversation.