[CONTRACT] UVM Verification Engineer

Overview

Job Title: UVM Verification Engineer Job Type: Contract Duration: 6 months' initial Location: Remote, France Start: ASAP Responsibilities

We are seeking a UVM Verification Engineer to join the client's Digital Verification team. You will be working extensively within their UVM environment to assist on High Speed System-on-Chips (SoCs). Qualifications

Extensive knowledge of UVM verification SystemVerilog Automated framework implementation Extensive experience in ASIC verification Knowledge of high speed interfaces, specifically Ethernet or similar SoC verification preferred but IP is okay How to apply

For more information on the position and the company, please contact us with an updated CV, availability and required rate.

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