Staff Physical Design Engineer Alphawave Semi

What You’ll Do Perform floorplanning, placement, clock tree synthesis (CTS), routing, and optimization for high-speed digital designs. Implement timing closure techniques, including clock skew balancing, delay optimization, OCV (on-chip variation) handling, and ECO (Engineering Change Orders). Conduct signal integrity, power integrity, IR drop, and electromigration analysis. Implement Optical Proximity Correction (OPC) litho shrink methodologies for advanced process nodes (e.g., TSMC N4P). Optimize power and area using techniques like Multi-Vt optimization, clock gating, and power-aware synthesis. Conduct physical verification (LVS, DRC, DFM) to ensure compliance with foundry sign-off requirements. Collaborate closely with design, verification, DFT, and process engineers to resolve design and manufacturing issues. Drive scripting and automation efforts (Python, Perl, TCL, or equivalent) to improve design efficiency. Please note that the most recent updates can be found by applying for the job.

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