Senior ML ASIC Design Engineer for AI HW

A leading developer in wireless technology is seeking an ASIC design engineer to develop world-class solutions for next-gen AI/ML HW IP. The role involves designing micro-architectures and RTL, integrating sub-IPs, and collaborating with verification teams. Candidates should have 2+ years in ASIC design or verification, along with a formal engineering education. A competitive salary ranging from $104,900 to $154,900 is offered, along with other benefits. #J-18808-Ljbffr