Senior ASIC Verification Engineer - RISC-V CPU RTL

A leading technology firm is seeking an experienced RTL Verification Engineer for a 5-day onsite role in Markham, Canada. The candidate will work on complex logical units for a new RISC-V application processor, collaborating with architecture, design, and validation teams. Requirements include a Bachelor's degree with 4+ years of relevant experience in RTL ASIC verification and proficiency in Verilog, System Verilog, and C/C++. The role offers considerable responsibility in meeting performance goals in a fast-paced environment. #J-18808-Ljbffr